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You are here: CodeIdol.com > Hardware > Hardware Design Verification > Debugging Process And Verification Cycle
Hardware Design Verification
| Chapter 6.
Chapter Highlights
Failure capture, scope reduction, and bug trackingSimulation data dumpingIsolation of underlying causesDesign update and maintenance: revision controlRegression, release mechanism, and tape-out criteria
The ultimate ...
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| 6.1.
All the facilities discussed in previous chapters, such as assertions, monitors, and test cases, are used for the same goal of revealing design errors, by enhancing observability and expanding input space. When an error surfaces, three actions...
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| 6.2.
Debugging can be done in interactive or postprocessing mode. In interactive mode, users debug on a simulator. They run the simulator for a number of cycles, pause it, examine the node or variable values in the circuit, continue simulating for ...
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| 6.3.
In this section we will look at the basic principles and practices in debugging hardware designs. First we will discuss using expected results as a guide to trace errors, and then we will study how erroneous signals are traced forward and back...
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| 6.4.
When a group of engineers work on a project consisting of many files, files change constantly while being accessed. It is imperative to have a system to manage multiple variants of evolving files and track revision, as well as manage the proje...
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| 6.5.
The centralized file database must maintain high-quality code. To prevent bugs from being checked into the centralized file database, a set of tests, called check-in tests, must be run to qualify the to-be-checked-in code. If the tests pass, t...
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| 6.6.
In this chapter we examined the debugging process and the verification cycle. During the debugging process, the environment in which a bug is detected must be preserved to make the bug reproducible. We listed several common environment variabl...
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| 6.7.
1.If a bug is detected while running a simulation under a revision control system, the environment variables required to reproduce the bug must include the versions of all the files used in the simulation.
List three revision control software...
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